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    Subject[PATCH 1/2] dt-bindings: clock: qcom: Document the X1E80100 TCSR Clock Controller
    Add bindings documentation for the X1E80100 TCSR Clock Controller.

    Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
    Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
    Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
    ---
    .../bindings/clock/qcom,x1e80100-tcsr.yaml | 55 ++++++++++++++++++++++
    include/dt-bindings/clock/qcom,x1e80100-tcsr.h | 23 +++++++++
    2 files changed, 78 insertions(+)

    diff --git a/Documentation/devicetree/bindings/clock/qcom,x1e80100-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,x1e80100-tcsr.yaml
    new file mode 100644
    index 000000000000..4adc8ee0287c
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/clock/qcom,x1e80100-tcsr.yaml
    @@ -0,0 +1,55 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/clock/qcom,x1e80100-tcsr.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: Qualcomm TCSR Clock Controller on X1E80100
    +
    +maintainers:
    + - Bjorn Andersson <andersson@kernel.org>
    +
    +description: |
    + Qualcomm TCSR clock control module provides the clocks, resets and
    + power domains on X1E80100
    +
    + See also:: include/dt-bindings/clock/qcom,x1e80100-tcsr.h
    +
    +properties:
    + compatible:
    + items:
    + - const: qcom,x1e80100-tcsr
    + - const: syscon
    +
    + clocks:
    + items:
    + - description: TCXO pad clock
    +
    + reg:
    + maxItems: 1
    +
    + '#clock-cells':
    + const: 1
    +
    + '#reset-cells':
    + const: 1
    +
    +required:
    + - compatible
    + - clocks
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + #include <dt-bindings/clock/qcom,rpmh.h>
    +
    + clock-controller@1fc0000 {
    + compatible = "qcom,x1e80100-tcsr", "syscon";
    + reg = <0x1fc0000 0x30000>;
    + clocks = <&rpmhcc RPMH_CXO_CLK>;
    + #clock-cells = <1>;
    + #reset-cells = <1>;
    + };
    +
    +...
    diff --git a/include/dt-bindings/clock/qcom,x1e80100-tcsr.h b/include/dt-bindings/clock/qcom,x1e80100-tcsr.h
    new file mode 100644
    index 000000000000..bae2c4654ee2
    --- /dev/null
    +++ b/include/dt-bindings/clock/qcom,x1e80100-tcsr.h
    @@ -0,0 +1,23 @@
    +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
    +/*
    + * Copyright (c) 2023, Linaro Limited
    + */
    +
    +#ifndef _DT_BINDINGS_CLK_QCOM_X1E80100_TCSR_CC_H
    +#define _DT_BINDINGS_CLK_QCOM_X1E80100_TCSR_CC_H
    +
    +/* TCSR CC clocks */
    +#define TCSR_PCIE_2L_4_CLKREF_EN 0
    +#define TCSR_PCIE_2L_5_CLKREF_EN 1
    +#define TCSR_PCIE_8L_CLKREF_EN 2
    +#define TCSR_USB3_MP0_CLKREF_EN 3
    +#define TCSR_USB3_MP1_CLKREF_EN 4
    +#define TCSR_USB2_1_CLKREF_EN 5
    +#define TCSR_UFS_PHY_CLKREF_EN 6
    +#define TCSR_USB4_1_CLKREF_EN 7
    +#define TCSR_USB4_2_CLKREF_EN 8
    +#define TCSR_USB2_2_CLKREF_EN 9
    +#define TCSR_PCIE_4L_CLKREF_EN 10
    +#define TCSR_EDP_CLKREF_EN 11
    +
    +#endif
    --
    2.34.1

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