Messages in this thread | | | From | Rahul Rameshbabu <> | Subject | Re: [PATCH net-next v4 1/1] ptp: clockmatrix: support 32-bit address space | Date | Wed, 22 Nov 2023 10:33:50 -0800 |
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On Wed, 15 Nov, 2023 10:10:53 -0500 Min Li <lnimi@hotmail.com> wrote: > From: Min Li <min.li.xe@renesas.com> > > We used to assume 0x2010xxxx address. Now that > we need to access 0x2011xxxx address, we need > to support read/write the whole 32-bit address space. > > Signed-off-by: Min Li <min.li.xe@renesas.com> > --- > - Drop MAX_ABS_WRITE_PHASE_PICOSECONDS advised by Rahul > - Apply SCSR_ADDR to scrach register in idtcm_load_firmware advised by Simon > - Apply u32 to base in idtcm_output_enable advised by Simon > - Correct sync_ctrl0/1 parameter position for idtcm_write advised by Simon > > drivers/ptp/ptp_clockmatrix.c | 71 ++-- > drivers/ptp/ptp_clockmatrix.h | 32 +- > include/linux/mfd/idt8a340_reg.h | 542 ++++++++++++++++--------------- > 3 files changed, 331 insertions(+), 314 deletions(-) > > diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clockmatrix.c > index f6f9d4adce04..1d5da77502e6 100644 > --- a/drivers/ptp/ptp_clockmatrix.c > +++ b/drivers/ptp/ptp_clockmatrix.c
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> @@ -1705,7 +1720,7 @@ static s32 idtcm_getmaxphase(struct ptp_clock_info *ptp __always_unused) > } > > /* > - * Internal function for implementing support for write phase offset > + * Maximum absolute value for write phase offset in picoseconds
This documentation comment is wrong (this is meant for idtcm_getmaxphase). I think you might be generating patches without rebasing on the latest net-next tree?
> * > * @channel: channel > * @delta_ns: delta in nanoseconds > @@ -1717,6 +1732,7 @@ static int _idtcm_adjphase(struct idtcm_channel *channel, s32 delta_ns) > u8 i; > u8 buf[4] = {0}; > s32 phase_50ps; > + s64 offset_ps; > > if (channel->mode != PTP_PLL_MODE_WRITE_PHASE) { > err = channel->configure_write_phase(channel); > @@ -1724,7 +1740,8 @@ static int _idtcm_adjphase(struct idtcm_channel *channel, s32 delta_ns) > return err; > } > > - phase_50ps = div_s64((s64)delta_ns * 1000, 50); > + offset_ps = (s64)delta_ns * 1000; > + phase_50ps = div_s64(offset_ps, 50);
Sorry, I am not sure what this change has to do with 32-bit address space support. Seems like this was introduced due to not rebasing properly on top of latest changes?
> > for (i = 0; i < 4; i++) { > buf[i] = phase_50ps & 0xff;
<snip>
-- Thanks,
Rahul Rameshbabu
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