Messages in this thread | | | Date | Mon, 20 Nov 2023 06:45:48 -0800 | Subject | Re: [PATCH v2 1/2] hwmon: (nct6775) Fix incomplete register array | From | Guenter Roeck <> |
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On 11/20/23 00:15, Xing Tong Wu wrote: > From: Xing Tong Wu <xingtong.wu@siemens.com> > > The nct6116 specification actually includes 5 PWMs, but only 3 > PWMs are present in the array. To address this, the missing 2 > PWMs have been added to the array. > > Signed-off-by: Xing Tong Wu <xingtong.wu@siemens.com> > --- > drivers/hwmon/nct6775-core.c | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/drivers/hwmon/nct6775-core.c b/drivers/hwmon/nct6775-core.c > index d928eb8ae5a3..c24b2c312911 100644 > --- a/drivers/hwmon/nct6775-core.c > +++ b/drivers/hwmon/nct6775-core.c > @@ -844,6 +844,9 @@ static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 }; > static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 }; > > static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 }; > +static const u8 NCT6116_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3, 0xf3, 0xf3 }; > +static const u8 NCT6116_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04, 0x04, 0x04 };
No, this isn't correct. Chapter 8.4.4 in the datasheet says that auxfanout1 and auxfanout2 are always in pwm mode, so those register addresses and bit positions need to be 0 in the array. Also, please just extend the NCT6106 arrays.
> +static const u16 NCT6116_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c, 0xd8, 0xd9 };
Please just extend the nct6106 array.
Thanks, Guenter
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