Messages in this thread | | | Date | Thu, 2 Nov 2023 14:09:24 -0700 | From | Dan Williams <> | Subject | RE: [PATCH] cxl/pci: Change CXL AER support check to use native AER |
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Terry Bowman wrote: > Native CXL protocol errors are delivered to the OS through AER > reporting. The owner of AER owns CXL Protocol error management with > respect to _OSC negotiation.[1] CXL device errors are handled by a > separate interrupt with native control gated by _OSC control field > 'CXL Memory Error Reporting Control'. > > The CXL driver incorrectly checks for 'CXL Memory Error Reporting > Control' before accessing AER registers and caching RCH downport > AER registers. Replace the current check in these 2 cases with > native AER checks. > > [1] CXL 3.0 - 9.17.2 CXL _OSC, Table-9-26, Interpretation of CXL > _OSC Support Fields, p.641
Makes sense, applied.
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