Messages in this thread | | | From | Geert Uytterhoeven <> | Date | Fri, 17 Nov 2023 09:48:20 +0100 | Subject | Re: [PATCH v2 1/2] arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2 |
| |
Hi Claudiu,
Thanks for the update!
On Mon, Oct 16, 2023 at 12:54 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Add SDHI2 to RZ/G3S Smarc SoM. SDHI2 pins are multiplexed with SCIF1, SSI0, > IRQ0, IRQ1. The selection b/w SDHI2 and SCIF1, SSI3, IRQ0, IRQ1 is done
SSI0
> with a switch button. To be able to select b/w these a compilation flag has > been added (SW_SD2_EN) at the moment being instantiated to select SDHI2. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.8, with the above fixed.
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
| |