Messages in this thread | ![/](/images/icornerl.gif) | | Date | Thu, 16 Nov 2023 14:59:42 +0530 | Subject | Re: [PATCH 2/4] clk: qcom: videocc-sm8150: Update the videocc resets | From | "Satya Priya Kakitapalli (Temp)" <> |
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On 11/15/2023 10:39 PM, Bryan O'Donoghue wrote: > On 15/11/2023 16:48, Konrad Dybcio wrote: >>> + [VIDEO_CC_INTERFACE_BCR] = { 0x9ac }, >>> + [VIDEO_CC_MVS0_BCR] = { 0x870 }, >>> + [VIDEO_CC_MVS1_BCR] = { 0x8b0 }, >>> + [VIDEO_CC_MVSC_BCR] = { 0x810 }, >> FWIW this seems to be a copypaste from >> >> https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blame/92b31370d31d22e910120f6a875bf0919b3f1773/drivers/clk/qcom/videocc-sm8150.c >> >> >> so if it's an issue, it should probably be fixed downstream too > > More of a question than a gotcha - 0x9ac is valid for sm8250 so > curious to me that its a different address on sm8150.
I have re-checked the offset values, as per the HW plan for SM8150 below values are correct:
+ [VIDEO_CC_INTERFACE_BCR] = { 0x8f0 }, + [VIDEO_CC_MVS0_BCR] = { 0x870 }, + [VIDEO_CC_MVS1_BCR] = { 0x8b0 }, + [VIDEO_CC_MVSC_BCR] = { 0x810 },
> --- > bod
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