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Subject[RFC PATCH V2 21/38] riscv: s64ilp32: Add MMU_SV32 mode support
Date
From: Guo Ren <guoren@linux.alibaba.com>

This needs to add Sv32 mode in the SATP CSR of RV64 ISA, a novel
extension of 64-bit processors' MMU. It could save a bit of page
table footprint and improve the page table walk performance:

s64ilp32 with Sv39:
PageTables: 136 kB

s64ilp32 with Sv32:
PageTables: 60 kB

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
---
arch/riscv/Kconfig | 11 ++++++++++-
arch/riscv/Kconfig.errata | 2 +-
arch/riscv/include/asm/csr.h | 1 +
3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 5a3eb5e7d67a..1d3a236d2c45 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -481,7 +481,7 @@ config RISCV_ISA_SVNAPOT

config RISCV_ISA_SVPBMT
bool "Svpbmt extension support for supervisor mode page-based memory types"
- depends on 64BIT && MMU
+ depends on !MMU_SV32 && MMU
depends on RISCV_ALTERNATIVE
default y
help
@@ -638,6 +638,15 @@ config THREAD_SIZE_ORDER
Specify the Pages of thread stack size (from 4KB to 64KB), which also
affects irq stack size, which is equal to thread stack size.

+config MMU_SV32
+ bool "MMU Sv32"
+ depends on 32BIT && MMU
+ help
+ ARCH_RV32I only supports MMU Sv32 mode, but ARCH_RV64ILP32 supports
+ MMU Sv39 & Sv32 (MMU Sv32 is optional for RV64 hardware).
+
+ If unsure, say N.
+
endmenu # "Platform type"

menu "Kernel features"
diff --git a/arch/riscv/Kconfig.errata b/arch/riscv/Kconfig.errata
index 0c8f4652cd82..1aa85a427ff3 100644
--- a/arch/riscv/Kconfig.errata
+++ b/arch/riscv/Kconfig.errata
@@ -44,7 +44,7 @@ config ERRATA_THEAD

config ERRATA_THEAD_PBMT
bool "Apply T-Head memory type errata"
- depends on ERRATA_THEAD && 64BIT && MMU
+ depends on ERRATA_THEAD && !MMU_SV32 && MMU
select RISCV_ALTERNATIVE_EARLY
default y
help
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 03acdedc100d..aa78c5f20d75 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -65,6 +65,7 @@
#define SATP_ASID_MASK _AC(0x1FF, UXL)
#else
#define SATP_PPN _AC(0x00000FFFFFFFFFFF, UXL)
+#define SATP_MODE_32 _AC(0x1000000000000000, UXL)
#define SATP_MODE_39 _AC(0x8000000000000000, UXL)
#define SATP_MODE_48 _AC(0x9000000000000000, UXL)
#define SATP_MODE_57 _AC(0xa000000000000000, UXL)
--
2.36.1
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