Messages in this thread | | | Date | Wed, 1 Nov 2023 11:31:46 +0800 | Subject | Re: [Patch 1/2] KVM: x86/pmu: Add Intel CPUID-hinted TopDown slots event | From | "Mi, Dapeng" <> |
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On 11/1/2023 11:04 AM, Jim Mattson wrote: > On Tue, Oct 31, 2023 at 6:59 PM Mi, Dapeng <dapeng1.mi@linux.intel.com> wrote: >> On 11/1/2023 2:22 AM, Jim Mattson wrote: >>> On Tue, Oct 31, 2023 at 1:58 AM Dapeng Mi <dapeng1.mi@linux.intel.com> wrote: >>>> This patch adds support for the architectural topdown slots event which >>>> is hinted by CPUID.0AH.EBX. >>> Can't a guest already program an event selector to count event select >>> 0xa4, unit mask 1, unless the event is prohibited by >>> KVM_SET_PMU_EVENT_FILTER? >> Actually defining this new slots arch event is to do the sanity check >> for supported arch-events which is enumerated by CPUID.0AH.EBX. >> Currently vPMU would check if the arch event from guest is supported by >> KVM. If not, it would be rejected just like intel_hw_event_available() >> shows. >> >> If we don't add the slots event in the intel_arch_events[] array, guest >> may program the slots event and pass the sanity check of KVM on a >> platform which actually doesn't support slots event and program the >> event on a real GP counter and got an invalid count. This is not correct. > On physical hardware, it is possible to program a GP counter with the > event selector and unit mask of the slots event whether or not the > platform supports it. Isn't KVM wrong to disallow something that a > physical CPU allows?
Yeah, I agree. But I'm not sure if this is a flaw on PMU driver. If an event is not supported by the hardware, we can't predict the PMU's behavior and a meaningless count may be returned and this could mislead the user.
Add Kan to confirm this.
Hi Kan,
Have you any comments on this? Thanks.
> >>> AFAICT, this change just enables event filtering based on >>> CPUID.0AH:EBX[bit 7] (though it's not clear to me why two independent >>> mechanisms are necessary for event filtering). >> >> IMO, these are two different things. this change is just to enable the >> supported arch events check for slot events, the event filtering is >> another thing. > How is clearing CPUID.0AH:EBX[bit 7] any different from putting {event > select 0xa4, unit mask 1} in a deny list with the PMU event filter?
I think there is no difference in the conclusion but with two different methods.
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