Messages in this thread | | | Date | Tue, 31 Oct 2023 10:16:57 +0800 | Subject | Re: [PATCH V6 2/3] pinctrl: Add support pin control for UP board CPLD/FPGA | From | larry <> |
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Hi Linus,
Cause we replied the wrong email-format to you last time.(Lee informed us that format is hard to read), so we send the comment again, thanks.
On 15/9/2023 17:02, Linus Walleij wrote: > On Fri, Sep 15, 2023 at 5:12 AM larry.lai <larry.lai@yunjingtech.com> wrote: > >> The UP Squared board <http://www.upboard.com> implements certain >> features (pin control) through an on-board FPGA. >> >> Reported-by: kernel test robot <lkp@intel.com> >> Signed-off-by: Gary Wang <garywang@aaeon.com.tw> >> Signed-off-by: larry.lai <larry.lai@yunjingtech.com> > > This v6 overall looks good to me! > Reviewed-by: Linus Walleij <linus.walleij@linaro.org> > > Can the patch be merged on its own? > >> +#include "core.h" >> +#include "intel/pinctrl-intel.h" > > Didn't notice this before. But if Andy is OK with it, I'm > OK with it, I guess there is a reason? Perhaps it warrants > a comment explaining why you do this? Need struct intel_pinctrl gpp information to control dedicated Raspberry Pi compatible GPIOs. These products (Up boards) are Intel approves foundation kits.
> > Valid reasons: > - You are using Intel-specific HW features also found in this > FPGA > > Invalid reasons: > - Using nifty macros or helpers, then either make them generic > or (if they are small) duplicate them. > > If it was that thing I asked Andy to keep locally because I didn't > agree with its generic usefulness, maybe I should be told to > reconsider. > > Yours, > Linus Walleij
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