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    Subject[PATCH v2 1/6] dt-bindings: display: Add yamls for JH7110 display system
    Date
    StarFive SoCs JH7110 display system:
    lcd-controller bases verisilicon dc8200 IP,
    and hdmi bases Innosilicon IP. Add bindings for them.

    also update MAINTAINERS for dt-bindings

    about this patch, I tested the dtbs_check and dt_binding_check
    with the result pass.
    Based on the feedback of the previous version, the corresponding arrangement is made

    Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
    ---
    .../starfive/starfive,display-subsystem.yaml | 41 +++++++
    .../starfive/starfive,jh7110-dc8200.yaml | 109 ++++++++++++++++++
    .../starfive/starfive,jh7110-inno-hdmi.yaml | 85 ++++++++++++++
    MAINTAINERS | 7 ++
    4 files changed, 242 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/display/starfive/starfive,display-subsystem.yaml
    create mode 100644 Documentation/devicetree/bindings/display/starfive/starfive,jh7110-dc8200.yaml
    create mode 100644 Documentation/devicetree/bindings/display/starfive/starfive,jh7110-inno-hdmi.yaml

    diff --git a/Documentation/devicetree/bindings/display/starfive/starfive,display-subsystem.yaml b/Documentation/devicetree/bindings/display/starfive/starfive,display-subsystem.yaml
    new file mode 100644
    index 000000000..f45b97b08
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/display/starfive/starfive,display-subsystem.yaml
    @@ -0,0 +1,41 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/display/starfive/starfive,display-subsystem.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: Starfive DRM master device
    +
    +maintainers:
    + - Keith Zhao <keith.zhao@starfivetech.com>
    + - ShengYang Chen <shengyang.chen@starfivetech.com>
    +
    +description:
    + The Starfive DRM master device is a virtual device needed to list all
    + display controller or other display interface nodes that comprise the
    + graphics subsystem.
    +
    +properties:
    + compatible:
    + const: starfive,display-subsystem
    +
    + ports:
    + $ref: /schemas/types.yaml#/definitions/phandle-array
    + description:
    + Should contain a list of phandles pointing to display interface ports
    + of display controller devices. Display controller definitions as defined
    + in Documentation/devicetree/bindings/display/starfive/
    + starfive,jh7110-dc8200.yaml
    +
    +required:
    + - compatible
    + - ports
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + display-subsystem {
    + compatible = "starfive,display-subsystem";
    + ports = <&dc_out>;
    + };
    diff --git a/Documentation/devicetree/bindings/display/starfive/starfive,jh7110-dc8200.yaml b/Documentation/devicetree/bindings/display/starfive/starfive,jh7110-dc8200.yaml
    new file mode 100644
    index 000000000..87051cddf
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/display/starfive/starfive,jh7110-dc8200.yaml
    @@ -0,0 +1,109 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/display/starfive/starfive,jh7110-dc8200.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: StarFive display controller
    +
    +description:
    + The StarFive SoC uses the display controller based on Verisilicon IP
    + to transfer the image data from a video memory buffer to an external
    + LCD interface.
    +
    +maintainers:
    + - Keith Zhao <keith.zhao@starfivetech.com>
    +
    +properties:
    + compatible:
    + const: starfive,jh7110-dc8200
    +
    + reg:
    + minItems: 1
    + items:
    + - description:
    + host interface
    + - description:
    + display physical base address and length.
    +
    + interrupts:
    + items:
    + - description: The interrupt will be generated when DC finish one frame
    +
    + clocks:
    + items:
    + - description: Clock for display system noc bus.
    + - description: Pixel clock for display channel 0.
    + - description: Pixel clock for display channel 1.
    + - description: Core clock for display controller.
    + - description: Clock for axi bus to access ddr.
    + - description: Clock for ahb bus to R/W the phy regs.
    + - description: External HDMI pixel clock.
    + - description: Parent clock for pixel clock
    +
    + clock-names:
    + items:
    + - const: noc_bus
    + - const: channel0
    + - const: channel1
    + - const: dc_core
    + - const: axi_core
    + - const: ahb
    + - const: hdmi_tx
    + - const: dc_parent
    +
    + resets:
    + items:
    + - description: Reset for axi bus.
    + - description: Reset for ahb bus.
    + - description: Core reset of display controller.
    +
    + reset-names:
    + items:
    + - const: axi
    + - const: ahb
    + - const: core
    +
    + port:
    + $ref: /schemas/graph.yaml#/properties/port
    +
    +required:
    + - compatible
    + - reg
    + - interrupts
    + - clocks
    + - clock-names
    + - resets
    + - reset-names
    + - port
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + dc8200: lcd-controller@29400000 {
    + compatible = "starfive,jh7110-dc8200";
    + reg = <0x29400000 0x100>, <0x29400800 0x2000>;
    + interrupts = <95>;
    + clocks = <&syscrg 60>,
    + <&voutcrg 7>,
    + <&voutcrg 8>,
    + <&voutcrg 4>,
    + <&voutcrg 5>,
    + <&voutcrg 6>,
    + <&hdmitx0_pixelclk>,
    + <&voutcrg 1>;
    + clock-names = "noc_bus", "channel0", "channel1",
    + "dc_core", "axi_core", "ahb",
    + "hdmi_tx","dc_parent";
    + resets = <&voutcrg 0>, <&voutcrg 1>, <&voutcrg 2>;
    + reset-names = "axi", "ahb", "core";
    + dc_out: port {
    + #address-cells = <1>;
    + #size-cells = <0>;
    + dc_out_hdmi: endpoint@0 {
    + reg = <0>;
    + remote-endpoint = <&hdmi_in_dc>;
    + };
    + };
    + };
    diff --git a/Documentation/devicetree/bindings/display/starfive/starfive,jh7110-inno-hdmi.yaml b/Documentation/devicetree/bindings/display/starfive/starfive,jh7110-inno-hdmi.yaml
    new file mode 100644
    index 000000000..f6c473a10
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/display/starfive/starfive,jh7110-inno-hdmi.yaml
    @@ -0,0 +1,85 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/display/starfive/starfive,jh7110-inno-hdmi.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: Starfive JH7110 HDMI controller
    +
    +description:
    + The StarFive JH7110 SoC uses the HDMI signal transmiter based on innosilicon IP
    + to generate HDMI signal from its input and transmit the signal to the screen.
    +
    +maintainers:
    + - Keith Zhao <keith.zhao@starfivetech.com>
    +
    +properties:
    + compatible:
    + const: "starfive,jh7110-inno-hdmi"
    +
    + reg:
    + minItems: 1
    +
    + interrupts:
    + items:
    + - description: The HDMI hot plug detection interrupt.
    +
    + clocks:
    + items:
    + - description: System clock of HDMI module.
    + - description: Mclk clock of HDMI audio.
    + - description: Bclk clock of HDMI audio.
    + - description: Pixel clock generated by HDMI module.
    +
    + clock-names:
    + items:
    + - const: sysclk
    + - const: mclk
    + - const: bclk
    + - const: pclk
    +
    + resets:
    + maxItems: 1
    +
    + '#sound-dai-cells':
    + const: 0
    +
    + port:
    + $ref: /schemas/graph.yaml#/properties/port
    + description:
    + Should contain a remote endpoint phandle of display controller device.
    +
    +required:
    + - compatible
    + - reg
    + - interrupts
    + - clocks
    + - clock-names
    + - resets
    + - '#sound-dai-cells'
    + - port
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + hdmi: hdmi@29590000 {
    + compatible = "starfive,jh7110-inno-hdmi";
    + reg = <0x29590000 0x4000>;
    + interrupts = <99>;
    + clocks = <&voutcrg 17>,
    + <&voutcrg 15>,
    + <&voutcrg 16>,
    + <&hdmitx0_pixelclk>;
    + clock-names = "sysclk", "mclk","bclk","pclk";
    + resets = <&voutcrg 9>;
    + #sound-dai-cells = <0>;
    + hdmi_in: port {
    + #address-cells = <1>;
    + #size-cells = <0>;
    + hdmi_in_dc: endpoint@0 {
    + reg = <0>;
    + remote-endpoint = <&dc_out_hdmi>;
    + };
    + };
    + };
    diff --git a/MAINTAINERS b/MAINTAINERS
    index 3be1bdfe8..46e51bca5 100644
    --- a/MAINTAINERS
    +++ b/MAINTAINERS
    @@ -6751,6 +6751,13 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
    F: Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml
    F: drivers/gpu/drm/panel/panel-tpo-tpg110.c

    +DRM DRIVERS FOR STARFIVE
    +M: Keith Zhao <keith.zhao@starfivetech.com>
    +L: dri-devel@lists.freedesktop.org
    +S: Maintained
    +T: git git://anongit.freedesktop.org/drm/drm-misc
    +F: Documentation/devicetree/bindings/display/starfive/
    +
    DRM DRIVER FOR USB DISPLAYLINK VIDEO ADAPTERS
    M: Dave Airlie <airlied@redhat.com>
    R: Sean Paul <sean@poorly.run>
    --
    2.34.1
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