Messages in this thread Patch in this message | | | From | Mukesh Ojha <> | Subject | [PATCH v2 2/4] arm64: dts: qcom: sm8250: Add TCSR halt register space | Date | Wed, 25 Oct 2023 22:36:39 +0530 |
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Enable download mode for sm8250 which can help collect ramdump for this SoC.
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> --- Changes in v2: - Improved commit text.
arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index be970472f6c4..76f470a78608 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -671,6 +671,7 @@ firmware { scm: scm { compatible = "qcom,scm-sm8250", "qcom,scm"; + qcom,dload-mode = <&tcsr 0x13000>; #reset-cells = <1>; }; }; @@ -2543,6 +2544,11 @@ #hwlock-cells = <1>; }; + tcsr: syscon@1fc0000 { + compatible = "qcom,sm8250-tcsr", "syscon"; + reg = <0x0 0x1fc0000 0x0 0x30000>; + }; + wsamacro: codec@3240000 { compatible = "qcom,sm8250-lpass-wsa-macro"; reg = <0 0x03240000 0 0x1000>; -- 2.7.4
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