Messages in this thread Patch in this message | | | From | Yu Chien Peter Lin <> | Subject | [RFC PATCH v3 RESEND 09/13] dt-bindings: riscv: Add T-Head PMU extension description | Date | Mon, 23 Oct 2023 08:40:56 +0800 |
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Document the ISA string for T-Head performance monitor extension which provides counter overflow interrupt mechanism.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> --- Changes v2 -> v3: - New patch --- Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index cc1f546fdbdc..5e9291d258d5 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -246,5 +246,11 @@ properties: in commit 2e5236 ("Ztso is now ratified.") of the riscv-isa-manual. + - const: xtheadpmu + description: + The T-Head performance monitor extension for counter overflow. For more + details, see the chapter 12 in the Xuantie C906 user manual. + https://github.com/T-head-Semi/openc906/tree/main/doc + additionalProperties: true ... -- 2.34.1
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