Messages in this thread | | | Date | Sat, 21 Oct 2023 20:34:23 +0200 | From | Wolfram Sang <> | Subject | Re: [PATCH v2] i2c: stm32f7: Fix PEC handling in case of SMBUS transfers |
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On Tue, Oct 10, 2023 at 10:44:54AM +0200, Alain Volmat wrote: > In case of SMBUS byte read with PEC enabled, the whole transfer > is split into two commands. A first write command, followed by > a read command. The write command does not have any PEC byte > and a PEC byte is appended at the end of the read command. > (cf Read byte protocol with PEC in SMBUS specification) > > Within the STM32 I2C controller, handling (either sending > or receiving) of the PEC byte is done via the PECBYTE bit in > register CR2. > > Currently, the PECBYTE is set at the beginning of a transfer, > which lead to sending a PEC byte at the end of the write command > (hence losing the real last byte), and also does not check the > PEC byte received during the read command. > > This patch corrects the function stm32f7_i2c_smbus_xfer_msg > in order to only set the PECBYTE during the read command. > > Fixes: 9e48155f6bfe ("i2c: i2c-stm32f7: Add initial SMBus protocols support") > Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> > Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
Applied to for-current, thanks!
BTW, there are some patches pending from this series for stm32f4/7. Do you have time for an ack?
http://patchwork.ozlabs.org/project/linux-i2c/list/?series=359230
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