Messages in this thread Patch in this message | | | Date | Mon, 2 Oct 2023 14:41:09 -0700 | Subject | Re: [PATCH v2 2/2] x86/sev-es: Only set x86_virt_bits to correct value | From | Dave Hansen <> |
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On 10/2/23 13:04, Nathan Chancellor wrote: > On Mon, Sep 11, 2023 at 05:27:03PM -0700, Adam Dunlap wrote: >> Instead of setting x86_virt_bits to a possibly-correct value and then >> correcting it later, do all the necessary checks before setting it. >> >> At this point, the #VC handler references boot_cpu_data.x86_virt_bits, >> and in the previous version, it would be triggered by the cpuids between >> the point at which it is set to 48 and when it is set to the correct >> value. >> >> Suggested-by: Dave Hansen <dave.hansen@linux.intel.com> >> Signed-off-by: Adam Dunlap <acdunlap@google.com> > Our continuous integration started seeing panics when booting ARCH=i386 > without KVM after this change landed in -tip as commit fbf6449f84bf > ("x86/sev-es: Set x86_virt_bits to the correct value straight away, > instead of a two-phase approach"):
I can't reproduce this, but I'm running a gcc-built kernel and I haven't tried very hard to replicate your qemu setup.
I did notice, though, that the patch in question forgot to move one assignment. Could you see if the attached patch fixes things for you?diff -puN arch/x86/kernel/cpu/common.c~cache-bits-debug arch/x86/kernel/cpu/common.c --- a/arch/x86/kernel/cpu/common.c~cache-bits-debug 2023-10-02 14:20:48.273415423 -0700 +++ b/arch/x86/kernel/cpu/common.c 2023-10-02 14:24:52.710129051 -0700 @@ -1142,6 +1142,7 @@ void get_cpu_address_sizes(struct cpuinf } } c->x86_cache_bits = c->x86_phys_bits; + c->x86_cache_alignment = c->x86_clflush_size; } static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) @@ -1595,8 +1596,6 @@ static void __init cpu_parse_early_param */ static void __init early_identify_cpu(struct cpuinfo_x86 *c) { - c->x86_cache_alignment = c->x86_clflush_size; - memset(&c->x86_capability, 0, sizeof(c->x86_capability)); c->extended_cpuid_level = 0; _ | |