Messages in this thread | | | Date | Thu, 12 Oct 2023 18:48:08 +0200 | Subject | Re: [PATCH v4 1/3] arm64: dts: qcom: Add interconnect nodes for SDX75 | From | Konrad Dybcio <> |
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On 10/4/23 10:08, Rohit Agarwal wrote: > Add interconnect nodes to support interconnects on SDX75. > Also parallely add the interconnect property for UART required > so that the bootup to shell does not break with interconnects > in place. > > Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sdx75.dtsi | 52 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 52 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi > index e180aa4..b4723fa 100644 > --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi > @@ -8,6 +8,8 @@ > > #include <dt-bindings/clock/qcom,rpmh.h> > #include <dt-bindings/clock/qcom,sdx75-gcc.h> > +#include <dt-bindings/interconnect/qcom,icc.h> > +#include <dt-bindings/interconnect/qcom,sdx75.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/power/qcom,rpmhpd.h> > #include <dt-bindings/power/qcom-rpmpd.h> > @@ -203,6 +205,19 @@ > }; > }; > > + clk_virt: interconnect-0 { > + compatible = "qcom,sdx75-clk-virt"; > + #interconnect-cells = <2>; > + qcom,bcm-voters = <&apps_bcm_voter>; > + clocks = <&rpmhcc RPMH_QPIC_CLK>; > + }; > + > + mc_virt: interconnect-1 { > + compatible = "qcom,sdx75-mc-virt"; > + #interconnect-cells = <2>; > + qcom,bcm-voters = <&apps_bcm_voter>; > + }; > + > memory@80000000 { > device_type = "memory"; > reg = <0x0 0x80000000 0x0 0x0>; > @@ -434,6 +449,9 @@ > clock-names = "m-ahb", > "s-ahb"; > iommus = <&apps_smmu 0xe3 0x0>; > + interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS > + &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "qup-core"; No qup-config?
My brain compiler says this would cause a dt checker warning, at least on next-20231012.
Konrad
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