Messages in this thread | | | Date | Thu, 12 Oct 2023 21:02:39 +0800 | Subject | Re: [PATCH v2 6/7] riscv: dts: sophgo: add initial CV1812H SoC device tree | From | Chen Wang <> |
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On 2023/10/12 17:41, Conor Dooley wrote: > On Tue, Oct 10, 2023 at 03:53:54PM +0800, Inochi Amaoto wrote: >>> On 2023/10/9 19:26, Inochi Amaoto wrote: >>>> Add initial device tree for the CV1812H RISC-V SoC by SOPHGO. >>>> >>>> Signed-off-by: Inochi Amaoto <inochiama@outlook.com> >>>> --- >>>> arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 36 +++++++++++++++++++++++++ >>>> 1 file changed, 36 insertions(+) >>>> create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h.dtsi >>>> >>>> diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi >>>> new file mode 100644 >>>> index 000000000000..3864d34b0100 >>>> --- /dev/null >>>> +++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi >>>> @@ -0,0 +1,36 @@ >>>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT) >>>> +/* >>>> + * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com> >>>> + */ >>>> + >>>> +#include <dt-bindings/interrupt-controller/irq.h> >>> This include is not required. >> Thx. > I can drop this include on application. Is the rest of the series okay > with you Chen Wang? > > Thanks, > Conor.
Yes, just remove this include and the others are all
Acked-by: Chen Wang <unicorn_wang@outlook.com>
I also ran dtbs check with W=1 and no warning found.
BTW, due to this patchset changes some code submitted by Jisheng, I have sent email to him and hope he to have a look too.
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