Messages in this thread Patch in this message | | | From | Johannes Zink <> | Date | Thu, 12 Oct 2023 11:02:13 +0200 | Subject | [PATCH net-next 2/5] net: stmmac: fix PPS capture input index |
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The stmmac supports up to 4 auxiliary snapshots that can be enabled by setting the appropriate bits in the PTP_ACR bitfield.
Previously instead of setting the bits, a fixed value was written to this bitfield instead of passing the appropriate bitmask.
Now the correct bit is set according to the ptp_clock_request.extts_index passed as a parameter to stmmac_enable().
Fixes: f4da56529da6 ("net: stmmac: Add support for external trigger timestamping") Signed-off-by: Johannes Zink <j.zink@pengutronix.de> --- drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c | 5 ++--- drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h | 2 +- 2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c index 29569188b30c..60e3d3ff42f3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c @@ -201,12 +201,11 @@ static int stmmac_enable(struct ptp_clock_info *ptp, acr_value &= ~PTP_ACR_MASK; if (on) { /* Enable External snapshot trigger */ - acr_value |= priv->plat->ext_snapshot_num; + acr_value |= PTP_ACR_ATSEN(rq->extts.index); acr_value |= PTP_ACR_ATSFC; } netdev_dbg(priv->dev, "Auxiliary Snapshot %d %s.\n", - priv->plat->ext_snapshot_num >> PTP_ACR_ATSEN_SHIFT, - on ? "enabled" : "disabled"); + rq->extts.index, on ? "enabled" : "disabled"); writel(acr_value, ptpaddr + PTP_ACR); mutex_unlock(&priv->aux_ts_lock); /* wait for auxts fifo clear to finish */ diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h index d1fe4b46f162..fce3fba2ffd2 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h @@ -79,7 +79,7 @@ #define PTP_ACR_ATSEN1 BIT(5) /* Auxiliary Snapshot 1 Enable */ #define PTP_ACR_ATSEN2 BIT(6) /* Auxiliary Snapshot 2 Enable */ #define PTP_ACR_ATSEN3 BIT(7) /* Auxiliary Snapshot 3 Enable */ -#define PTP_ACR_ATSEN_SHIFT 5 /* Auxiliary Snapshot shift */ +#define PTP_ACR_ATSEN(index) (PTP_ACR_ATSEN0 << (index)) #define PTP_ACR_MASK GENMASK(7, 4) /* Aux Snapshot Mask */ #define PMC_ART_VALUE0 0x01 /* PMC_ART[15:0] timer value */ #define PMC_ART_VALUE1 0x02 /* PMC_ART[31:16] timer value */ -- 2.39.2
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