Messages in this thread | | | Subject | Re: [PATCH V2 4/4] clk: meson: c3: add c3 clock peripherals controller driver | From | Stephen Boyd <> | Date | Thu, 12 Oct 2023 16:51:44 -0700 |
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Quoting Xianwei Zhao (2023-10-09 23:29:17) > diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig > index 76be4bbd2afb..c8d59d28c8ff 100644 > --- a/drivers/clk/meson/Kconfig > +++ b/drivers/clk/meson/Kconfig > @@ -140,6 +140,19 @@ config COMMON_CLK_C3_PLL > Say Y if you want the board to work, because PLLs are the parent of most > peripherals. > > +config COMMON_CLK_C3_PERIPHERALS > + tristate "Amlogic C3 peripherals clock controller" > + default y
Why are these default y? They should depend on something like ARM64 and even then I don't see why we want to enable them by default if we're building the ARM64 kernel.
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