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SubjectRe: [PATCH 1/2] watchdog: rzg2l_wdt: Issue a reset before we put the PM clocks
On Thu, Nov 17, 2022 at 12:49 PM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> On RZ/Five SoC it was observed that setting timeout (to say 1 sec) wouldn't
> reset the system.
>
> The procedure described in the HW manual (Procedure for Activating Modules)
> for activating the target module states we need to start supply of the
> clock module before applying the reset signal. This patch makes sure we
> follow the same procedure to clear the registers of the WDT module, fixing
> the issues seen on RZ/Five SoC.
>
> While at it re-used rzg2l_wdt_stop() in rzg2l_wdt_set_timeout() as it has
> the same function calls.
>
> Fixes: 4055ee81009e ("watchdog: rzg2l_wdt: Add set_timeout callback")
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

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