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    Subject[PATCH v2 3/8] arm64: dts: qcom: sc7280: audioreach: Add lpass pil node
    Date
    Add lpass pil node for sc7280 based audioreach platforms.

    Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
    Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
    ---
    arch/arm64/boot/dts/qcom/sc7280.dtsi | 90 ++++++++++++++++++++++++++++++++++++
    1 file changed, 90 insertions(+)

    diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
    index 0adf133..f10a663 100644
    --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
    @@ -8,6 +8,7 @@
    #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
    #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
    +#include <dt-bindings/clock/qcom,lpass-sc7280.h>
    #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
    #include <dt-bindings/clock/qcom,rpmh.h>
    @@ -21,6 +22,7 @@
    #include <dt-bindings/power/qcom-rpmpd.h>
    #include <dt-bindings/reset/qcom,sdm845-aoss.h>
    #include <dt-bindings/reset/qcom,sdm845-pdc.h>
    +#include <dt-bindings/soc/qcom,gpr.h>
    #include <dt-bindings/soc/qcom,rpmh-rsc.h>
    #include <dt-bindings/sound/qcom,lpass.h>
    #include <dt-bindings/thermal/thermal.h>
    @@ -3436,6 +3438,94 @@
    status = "disabled";
    };

    + remoteproc_adsp: remoteproc@3000000 {
    + compatible = "qcom,sc7280-adsp-pil";
    + reg = <0 0x03000000 0 0x5000>, <0 0x0355b000 0 0x10>;
    + reg-names = "qdsp6ss_base", "lpass_efuse";
    +
    + interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
    + <&adsp_smp2p_in 0 IRQ_TYPE_NONE>,
    + <&adsp_smp2p_in 1 IRQ_TYPE_NONE>,
    + <&adsp_smp2p_in 2 IRQ_TYPE_NONE>,
    + <&adsp_smp2p_in 3 IRQ_TYPE_NONE>,
    + <&adsp_smp2p_in 7 IRQ_TYPE_NONE>;
    +
    + interrupt-names = "wdog", "fatal", "ready",
    + "handover", "stop-ack", "shutdown-ack";
    +
    + qcom,qmp = <&aoss_qmp>;
    +
    + clocks = <&rpmhcc RPMH_CXO_CLK>,
    + <&gcc GCC_CFG_NOC_LPASS_CLK>;
    +
    + clock-names = "xo", "gcc_cfg_noc_lpass";
    +
    + iommus = <&apps_smmu 0x1800 0x0>;
    +
    + power-domains = <&rpmhpd SC7280_CX>;
    + power-domain-names = "cx";
    +
    + required-opps = <&rpmhpd_opp_nom>;
    +
    + resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
    + <&aoss_reset AOSS_CC_LPASS_RESTART>;
    +
    + reset-names = "pdc_sync", "cc_lpass";
    + qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>;
    +
    + memory-region = <&adsp_mem>;
    +
    + qcom,smem-states = <&adsp_smp2p_out 0>;
    + qcom,smem-state-names = "stop";
    +
    + glink-edge {
    + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
    + IPCC_MPROC_SIGNAL_GLINK_QMP
    + IRQ_TYPE_EDGE_RISING>;
    +
    + mboxes = <&ipcc IPCC_CLIENT_LPASS
    + IPCC_MPROC_SIGNAL_GLINK_QMP>;
    +
    + label = "lpass";
    + qcom,remote-pid = <2>;
    +
    + gpr {
    + compatible = "qcom,gpr";
    + qcom,glink-channels = "adsp_apps";
    + qcom,domain = <GPR_DOMAIN_ID_ADSP>;
    + #address-cells = <1>;
    + #size-cells = <0>;
    + qcom,intents = <512 20>;
    +
    + q6apm: q6apm {
    + reg = <GPR_APM_MODULE_IID>;
    + compatible = "qcom,q6apm";
    + #sound-dai-cells = <0>;
    + q6apmdai: dais {
    + compatible = "qcom,q6apm-dais";
    + #sound-dai-cells = <1>;
    + iommus = <&apps_smmu 0x1801 0x0>;
    + };
    +
    + q6apmbedai: bedais {
    + compatible = "qcom,q6apm-lpass-dais";
    + #sound-dai-cells = <1>;
    + };
    + };
    +
    + q6prm: q6prm {
    + reg = <GPR_PRM_MODULE_IID>;
    + compatible = "qcom,q6prm";
    + #clock-cells = <2>;
    + q6prmcc: cc {
    + compatible = "qcom,q6prm-lpass-clocks";
    + #clock-cells = <2>;
    + };
    + };
    + };
    + };
    + };
    +
    remoteproc_wpss: remoteproc@8a00000 {
    compatible = "qcom,sc7280-wpss-pil";
    reg = <0 0x08a00000 0 0x10000>;
    --
    2.7.4
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