Messages in this thread Patch in this message |  | | From | Richard Zhu <> | Subject | [PATCH v7 1/5] dt-bindings: imx6q-pcie: Prepare to separate the Endpoint binding document | Date | Mon, 30 Jan 2023 11:32:15 +0800 |
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Prepare to create one separate DT-schema for i.MX PCIe Endpoint controllers in another commit.
Remove the EP mode compatible, and update the description.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- .../devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index f13f87fddb3d..2985d14b9ecc 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -13,6 +13,11 @@ maintainers: description: |+ This PCIe host controller is based on the Synopsys DesignWare PCIe IP and thus inherits all the common properties defined in snps,dw-pcie.yaml. + The controller instances are dual mode where in they can work either in + Root Port mode or Endpoint mode but one at a time. + + See fsl,imx6q-pcie-ep.yaml for details on the Endpoint mode device tree + bindings. properties: compatible: @@ -24,9 +29,6 @@ properties: - fsl,imx8mq-pcie - fsl,imx8mm-pcie - fsl,imx8mp-pcie - - fsl,imx8mm-pcie-ep - - fsl,imx8mq-pcie-ep - - fsl,imx8mp-pcie-ep reg: items: @@ -178,6 +180,7 @@ required: allOf: - $ref: /schemas/pci/snps,dw-pcie.yaml# + - if: properties: compatible: -- 2.34.1
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