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SubjectRE: RESEND: MMCONFIG related question

>-----Original Message-----
>From: Bjorn Helgaas <>
>Sent: Friday, January 13, 2023 9:54 PM
>To: Duan, Zhenzhong <>
>Cc:;; Yang, Lixiao
><>; Peng, Chao P <>
>Subject: Re: RESEND: MMCONFIG related question
>On Fri, Jan 13, 2023 at 10:15:45AM +0000, Duan, Zhenzhong wrote:
>> Recently Lixiao reported sriov disappered for cards which supported
>> sriov. We found it's related to commit "07eab0901ed efi/x86: Remove
>> EfiMemoryMappedIO from E820 map" which removed
>> regions from E820 map which lead to pci_mmcfg_reject_broken() check
>> failed, raw_pci_ext_ops isn't set to pci_mmcfg finally, below is the
>> related log. I know maybe bios should add MMCONFIG region into ACPI
>> motherboard resources, just want to ask if we would support the case
>> when MMCONFIG is missed in ACPI motherboard resources as I see it's
>> treated as "Firmware Info" not "Firmware bug". Thanks
>The patches here:
>should resolve this problem.
Will try.

>> Also has another question, if MMCONFIG happened to be in
>> EfiMemoryMappedIO, even if it's removed from E820 map so that there is
>> no CRS clip for that region, could it be used for BAR space?
>MMCONFIG cannot be used for BAR space. MMCONFIG should be reported
>via PNP0C02 _CRS. BAR space, i.e., a PCI host bridge aperture, should be
>reported via PNP0A03 _CRS.
>> Will there be conflict for BAR and MMCONFIG access?
>I don't think so, but I don't completely understand the scenario you're asking
I mean the case when MMCONFIG space reported by ACPI table overlap with PCI host bridge aperture reported by PNP0A03 _CRS. Just realized this case should be firmware bug, sorry for confusing.

>The E820 clipping of PCI host bridge windows is only intended to work around
>an issue where PNP0A03 _CRS reports space that is not part of the host bridge
>windows. E.g., there were a few platforms that seemed to report host bridge
>register space via _CRS.
Understood, thanks Bjorn.

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