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    SubjectRe: [PATCH] net: mdio: force deassert MDIO reset signal
    > IMHO, since the framework allows defining the reset GPIO, it does not sound
    > reasonable to manage it only after checking if the PHY can communicate:
    > if the reset is asserted, the PHY cannot communicate at all.
    > This patch just ensures that, if the reset GPIO is defined, it's not asserted
    > while checking the communication.

    The problem is, you are only solving 1/4 of the problem. What about
    the clock the PHY needs? And the regulator, and the linux reset
    controller? And what order to do enable these, and how long do you
    wait between each one?

    And why are you solving this purely for Ethernet PHYs when the same
    problem probably affects other sorts of devices which have reset
    GPIOs, regulators and clocks? It looks like MMC/SDIO devices have a
    similar problem.

    https://lwn.net/Articles/867740/

    As i said, i've not been following this work. Has it got anywhere? Can
    ethernet PHYs use it?

    Andrew

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