Messages in this thread | | | Date | Fri, 13 Jan 2023 14:19:05 +0200 | From | Maxim Mikityanskiy <> | Subject | Re: [net-next PATCH 4/5] octeontx2-pf: Add devlink support to configure TL1 RR_PRIO |
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On Thu, Jan 12, 2023 at 11:01:19PM +0530, Hariprasad Kelam wrote: > All VFs and PF netdev shares same TL1 schedular, each interface > PF or VF will have different TL2 schedulars having same parent > TL1. The TL1 RR_PRIO value is static and PF/VFs use the same value > to configure its TL2 node priority in case of DWRR children. > > This patch adds support to configure TL1 RR_PRIO value using devlink. > The TL1 RR_PRIO can be configured for each PF. The VFs are not allowed > to configure TL1 RR_PRIO value. The VFs can get the RR_PRIO value from > the mailbox NIX_TXSCH_ALLOC response parameter aggr_lvl_rr_prio. > > Example command to configure TL1 RR_PRIO to 6 for PF 0002:04:00.0: > $ devlink -p dev param set pci/0002:04:00.0 name tl1_rr_prio value 6 \ > cmode runtime
Could you please elaborate how these priorities of Transmit Levels are related to HTB priorities? I don't seem to understand why something has to be configured with devlink in addition to HTB.
Also, what do MDQ and SMQ abbreviations mean?
(Ccing Jiri for devlink stuff.)
> > Limitations: > 1. The RR_PRIO can only be configured before VFs are enabled > > Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> > Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> > ---
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