Messages in this thread | | | Date | Tue, 10 Jan 2023 08:01:44 +0100 | From | Christoph Hellwig <> | Subject | Re: [RFC PATCH v6 1/6] riscv: mm: dma-noncoherent: Switch using function pointers for cache management |
| |
On Mon, Jan 09, 2023 at 01:59:12PM +0100, Arnd Bergmann wrote: > I had another look at the arm64 side, which (like the zicbom > variant) uses 'clean' on dma_sync_single_for_device(DMA_FROM_DEVICE), > as that has changed not that long ago, see > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c50f11c6196f45c92ca48b16a5071615d4ae0572
which IIRC has been reverted recently.
> I'm still not sure what the correct set of operations has > to be, but nothing in that patch description sounds ISA > or even microarchitecture specific.
Nothing is ISA specific, and the only micro architecture related thing is if the specific core can speculate memory accesses. See the table in arch/arc/mm/dma.c for details.
And as commented on the arm64 patch I really hate architectures getting creative here, as I'd much prefer to move the choice of primitives to the core DMA code and just provide helpers to invalidate/writeback/ writeback+invalidate from the architectures eventually.
| |