Messages in this thread | | | Date | Tue, 10 Jan 2023 13:14:22 +0000 | Subject | Re: [PATCH v2 4/7] arm64: dts: qcom: Add msm8939 SoC | From | Bryan O'Donoghue <> |
| |
On 03/01/2023 09:14, Krzysztof Kozlowski wrote: > ../arch/arm64/boot/dts/qcom/msm8939.dtsi:1825.23-1842.5: Warning > (simple_bus_reg): /soc@0/mmc@7824000: simple-bus unit address format > error, expected "7824900
For the record the driver consuming this dt entry requires the host regs to come first followed by the core
sdhc_1: mmc@7824000 { compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"; reg = <0x07824900 0x11c>, <0x07824000 0x800>; reg-names = "hc", "core"; }
If I change this and the msm8916 to
sdhc_1: mmc@7824000 { compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"; reg = <0x07824000 0x800>, <0x07824900 0x11c>; reg-names = "core", "hc"; }
the warning goes away but then this code won't work as intended anymore.
drivers/mmc/host/sdhci-msm.c: msm_host->core_mem = devm_platform_ioremap_resource(pdev, 1);
Weirdly when I change the ordering of the registers in the dts the SD seems to work just fine, which is at variance to my reading of the code.
Converting the sdhci driver to use the register name, instead of a static ordering of the regs feels like something to be done in a separate series.
--- bod
| |