Messages in this thread | | | From | Peter Collingbourne <> | Date | Fri, 9 Sep 2022 17:54:13 -0700 | Subject | Re: [PATCH v4] arm64: mte: move register initialization to C |
| |
On Tue, Sep 6, 2022 at 5:36 PM Evgenii Stepanov <eugenis@google.com> wrote: > > If FEAT_MTE2 is disabled via the arm64.nomte command line argument on a > CPU that claims to support FEAT_MTE2, the kernel will use Tagged Normal > in the MAIR. If we interpret arm64.nomte to mean that the CPU does not > in fact implement FEAT_MTE2, setting the system register like this may > lead to UNSPECIFIED behavior. Fix it by arranging for MAIR to be set > in the C function cpu_enable_mte which is called based on the sanitized > version of the system register. > > There is no need for the rest of the MTE-related system register > initialization to happen from assembly, with the exception of TCR_EL1, > which must be set to include at least TBI1 because the secondary CPUs > access KASan-allocated data structures early. Therefore, make the TCR_EL1 > initialization unconditional and move the rest of the initialization to > cpu_enable_mte so that we no longer have a dependency on the unsanitized > ID register value.
Moving the register initialization to C also fixes a bug where the kernel's zeroing of TFSR_EL1 has no practical effect when the kernel is started in VHE mode because the register is currently being zeroed prior to the kernel enabling the redirect of TFSR_EL2 to TFSR_EL1 when it enables VHE. As a result, without this patch it is possible to get a spurious KASAN error report if TFSR_EL2 is non-zero out of reset.
Peter
| |