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    Subject[PATCH v3 5/6] soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes
    Date
    From: Ben Dooks <ben.dooks@sifive.com>

    Use the pr_fmt() macro to prefix all the output with "CCACHE:"
    to avoid having to write it out each time, or make a large diff
    when the next change comes along.

    Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
    Signed-off-by: Zong Li <zong.li@sifive.com>
    Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
    ---
    drivers/soc/sifive/sifive_ccache.c | 15 +++++++++------
    1 file changed, 9 insertions(+), 6 deletions(-)

    diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c
    index 58d14f11a63a..b3929c4d6d5b 100644
    --- a/drivers/soc/sifive/sifive_ccache.c
    +++ b/drivers/soc/sifive/sifive_ccache.c
    @@ -5,6 +5,9 @@
    * Copyright (C) 2018-2022 SiFive, Inc.
    *
    */
    +
    +#define pr_fmt(fmt) "CCACHE: " fmt
    +
    #include <linux/debugfs.h>
    #include <linux/interrupt.h>
    #include <linux/of_irq.h>
    @@ -85,13 +88,13 @@ static void ccache_config_read(void)

    cfg = readl(ccache_base + SIFIVE_CCACHE_CONFIG);

    - pr_info("CCACHE: %u banks, %u ways, sets/bank=%llu, bytes/block=%llu\n",
    + pr_info("%u banks, %u ways, sets/bank=%llu, bytes/block=%llu\n",
    (cfg & 0xff), (cfg >> 8) & 0xff,
    BIT_ULL((cfg >> 16) & 0xff),
    BIT_ULL((cfg >> 24) & 0xff));

    cfg = readl(ccache_base + SIFIVE_CCACHE_WAYENABLE);
    - pr_info("CCACHE: Index of the largest way enabled: %u\n", cfg);
    + pr_info("Index of the largest way enabled: %u\n", cfg);
    }

    static const struct of_device_id sifive_ccache_ids[] = {
    @@ -155,7 +158,7 @@ static irqreturn_t ccache_int_handler(int irq, void *device)
    if (irq == g_irq[DIR_CORR]) {
    add_h = readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_HIGH);
    add_l = readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_LOW);
    - pr_err("CCACHE: DirError @ 0x%08X.%08X\n", add_h, add_l);
    + pr_err("DirError @ 0x%08X.%08X\n", add_h, add_l);
    /* Reading this register clears the DirError interrupt sig */
    readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_COUNT);
    atomic_notifier_call_chain(&ccache_err_chain,
    @@ -175,7 +178,7 @@ static irqreturn_t ccache_int_handler(int irq, void *device)
    if (irq == g_irq[DATA_CORR]) {
    add_h = readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_HIGH);
    add_l = readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_LOW);
    - pr_err("CCACHE: DataError @ 0x%08X.%08X\n", add_h, add_l);
    + pr_err("DataError @ 0x%08X.%08X\n", add_h, add_l);
    /* Reading this register clears the DataError interrupt sig */
    readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_COUNT);
    atomic_notifier_call_chain(&ccache_err_chain,
    @@ -185,7 +188,7 @@ static irqreturn_t ccache_int_handler(int irq, void *device)
    if (irq == g_irq[DATA_UNCORR]) {
    add_h = readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_HIGH);
    add_l = readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_LOW);
    - pr_err("CCACHE: DataFail @ 0x%08X.%08X\n", add_h, add_l);
    + pr_err("DataFail @ 0x%08X.%08X\n", add_h, add_l);
    /* Reading this register clears the DataFail interrupt sig */
    readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_COUNT);
    atomic_notifier_call_chain(&ccache_err_chain,
    @@ -227,7 +230,7 @@ static int __init sifive_ccache_init(void)
    rc = request_irq(g_irq[i], ccache_int_handler, 0, "ccache_ecc",
    NULL);
    if (rc) {
    - pr_err("CCACHE: Could not request IRQ %d\n", g_irq[i]);
    + pr_err("Could not request IRQ %d\n", g_irq[i]);
    return rc;
    }
    }
    --
    2.17.1
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