Messages in this thread | | | Date | Tue, 6 Sep 2022 14:15:31 +0800 | From | kernel test robot <> | Subject | drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:1933:5: warning: no previous prototype for 'get_frame_rate_at_max_stretch_100hz' |
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Hi Rodrigo,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 53e99dcff61e1523ec1c3628b2d564ba15d32eb7 commit: 00fa7f031dd4b885175da390e24cb02f6a45977e drm/amd/display: Add basic infrastructure for enabling FAMS date: 9 weeks ago config: i386-buildonly-randconfig-r004-20220905 (https://download.01.org/0day-ci/archive/20220906/202209061427.nCA7sXSr-lkp@intel.com/config) compiler: gcc-11 (Debian 11.3.0-5) 11.3.0 reproduce (this is a W=1 build): # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=00fa7f031dd4b885175da390e24cb02f6a45977e git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout 00fa7f031dd4b885175da390e24cb02f6a45977e # save the config file mkdir build_dir && cp config build_dir/.config make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/
If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
| ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:386:9: note: in expansion of macro 'SR' 386 | SR(MPC_CRC_RESULT_GB), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:624:17: note: in expansion of macro 'HWSEQ_DCN30_REG_LIST' 624 | HWSEQ_DCN30_REG_LIST() | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/sienna_cichlid_ip_offset.h:373:52: note: (near initialization for 'hwseq_reg.MPC_CRC_RESULT_GB') 373 | #define DCN_BASE__INST0_SEG3 0x00009000 | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:113:25: note: in expansion of macro 'DCN_BASE__INST0_SEG3' 113 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:115:19: note: in expansion of macro 'BASE_INNER' 115 | #define BASE(seg) BASE_INNER(seg) | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:118:29: note: in expansion of macro 'BASE' 118 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:386:9: note: in expansion of macro 'SR' 386 | SR(MPC_CRC_RESULT_GB), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:624:17: note: in expansion of macro 'HWSEQ_DCN30_REG_LIST' 624 | HWSEQ_DCN30_REG_LIST() | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/sienna_cichlid_ip_offset.h:373:52: warning: initialized field overwritten [-Woverride-init] 373 | #define DCN_BASE__INST0_SEG3 0x00009000 | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:113:25: note: in expansion of macro 'DCN_BASE__INST0_SEG3' 113 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:115:19: note: in expansion of macro 'BASE_INNER' 115 | #define BASE(seg) BASE_INNER(seg) | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:118:29: note: in expansion of macro 'BASE' 118 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:387:9: note: in expansion of macro 'SR' 387 | SR(MPC_CRC_RESULT_C), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:624:17: note: in expansion of macro 'HWSEQ_DCN30_REG_LIST' 624 | HWSEQ_DCN30_REG_LIST() | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/sienna_cichlid_ip_offset.h:373:52: note: (near initialization for 'hwseq_reg.MPC_CRC_RESULT_C') 373 | #define DCN_BASE__INST0_SEG3 0x00009000 | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:113:25: note: in expansion of macro 'DCN_BASE__INST0_SEG3' 113 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:115:19: note: in expansion of macro 'BASE_INNER' 115 | #define BASE(seg) BASE_INNER(seg) | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:118:29: note: in expansion of macro 'BASE' 118 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:387:9: note: in expansion of macro 'SR' 387 | SR(MPC_CRC_RESULT_C), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:624:17: note: in expansion of macro 'HWSEQ_DCN30_REG_LIST' 624 | HWSEQ_DCN30_REG_LIST() | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/sienna_cichlid_ip_offset.h:373:52: warning: initialized field overwritten [-Woverride-init] 373 | #define DCN_BASE__INST0_SEG3 0x00009000 | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:113:25: note: in expansion of macro 'DCN_BASE__INST0_SEG3' 113 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:115:19: note: in expansion of macro 'BASE_INNER' 115 | #define BASE(seg) BASE_INNER(seg) | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:118:29: note: in expansion of macro 'BASE' 118 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:388:9: note: in expansion of macro 'SR' 388 | SR(MPC_CRC_RESULT_AR), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:624:17: note: in expansion of macro 'HWSEQ_DCN30_REG_LIST' 624 | HWSEQ_DCN30_REG_LIST() | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/sienna_cichlid_ip_offset.h:373:52: note: (near initialization for 'hwseq_reg.MPC_CRC_RESULT_AR') 373 | #define DCN_BASE__INST0_SEG3 0x00009000 | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:113:25: note: in expansion of macro 'DCN_BASE__INST0_SEG3' 113 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:115:19: note: in expansion of macro 'BASE_INNER' 115 | #define BASE(seg) BASE_INNER(seg) | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:118:29: note: in expansion of macro 'BASE' 118 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:388:9: note: in expansion of macro 'SR' 388 | SR(MPC_CRC_RESULT_AR), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:624:17: note: in expansion of macro 'HWSEQ_DCN30_REG_LIST' 624 | HWSEQ_DCN30_REG_LIST() | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:1902:5: warning: no previous prototype for 'get_refresh_rate' [-Wmissing-prototypes] 1902 | int get_refresh_rate(struct dc_state *context) | ^~~~~~~~~~~~~~~~ >> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:1933:5: warning: no previous prototype for 'get_frame_rate_at_max_stretch_100hz' [-Wmissing-prototypes] 1933 | int get_frame_rate_at_max_stretch_100hz(struct dc_state *context) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:1963:6: warning: no previous prototype for 'is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch' [-Wmissing-prototypes] 1963 | bool is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch(struct dc_state *context) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:1980:6: warning: no previous prototype for 'dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch' [-Wmissing-prototypes] 1980 | bool dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:2040:5: warning: no previous prototype for 'dcn30_find_dummy_latency_index_for_fw_based_mclk_switch' [-Wmissing-prototypes] 2040 | int dcn30_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *context, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32, from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/resource.h:28, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c:32: drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:137:22: warning: 'SYNAPTICS_DEVICE_ID' defined but not used [-Wunused-const-variable=] 137 | static const uint8_t SYNAPTICS_DEVICE_ID[] = "SYNA"; | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:134:17: warning: 'DP_SINK_BRANCH_DEV_NAME_7580' defined but not used [-Wunused-const-variable=] 134 | static const u8 DP_SINK_BRANCH_DEV_NAME_7580[] = "7580\x80u"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:132:22: warning: 'DP_SINK_DEVICE_STR_ID_2' defined but not used [-Wunused-const-variable=] 132 | static const uint8_t DP_SINK_DEVICE_STR_ID_2[] = {7, 1, 8, 7, 5, 0}; | ^~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:131:22: warning: 'DP_SINK_DEVICE_STR_ID_1' defined but not used [-Wunused-const-variable=] 131 | static const uint8_t DP_SINK_DEVICE_STR_ID_1[] = {7, 1, 8, 7, 3, 0}; | ^~~~~~~~~~~~~~~~~~~~~~~
vim +/get_frame_rate_at_max_stretch_100hz +1933 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_resource.c
1932 > 1933 int get_frame_rate_at_max_stretch_100hz(struct dc_state *context) 1934 { 1935 struct dc_crtc_timing *timing = NULL; 1936 uint32_t sec_per_100_lines; 1937 uint32_t max_v_blank; 1938 uint32_t curr_v_blank; 1939 uint32_t v_stretch_max; 1940 uint32_t stretched_frame_pix_cnt; 1941 uint32_t scaled_stretched_frame_pix_cnt; 1942 uint32_t scaled_refresh_rate; 1943 1944 if (context == NULL || context->streams[0] == NULL) 1945 return 0; 1946 1947 /* check if refresh rate at least 120hz */ 1948 timing = &context->streams[0]->timing; 1949 if (timing == NULL) 1950 return 0; 1951 1952 sec_per_100_lines = timing->pix_clk_100hz / timing->h_total + 1; 1953 max_v_blank = sec_per_100_lines / V_SCALE + 1; 1954 curr_v_blank = timing->v_total - timing->v_addressable; 1955 v_stretch_max = (max_v_blank > curr_v_blank) ? (max_v_blank - curr_v_blank) : (0); 1956 stretched_frame_pix_cnt = (v_stretch_max + timing->v_total) * timing->h_total; 1957 scaled_stretched_frame_pix_cnt = stretched_frame_pix_cnt / 10000; 1958 scaled_refresh_rate = (timing->pix_clk_100hz) / scaled_stretched_frame_pix_cnt + 1; 1959 1960 return scaled_refresh_rate; 1961 } 1962 > 1963 bool is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch(struct dc_state *context) 1964 { 1965 int refresh_rate_max_stretch_100hz; 1966 int min_refresh_100hz; 1967 1968 if (context == NULL || context->streams[0] == NULL) 1969 return false; 1970 1971 refresh_rate_max_stretch_100hz = get_frame_rate_at_max_stretch_100hz(context); 1972 min_refresh_100hz = context->streams[0]->timing.min_refresh_in_uhz / 10000; 1973 1974 if (refresh_rate_max_stretch_100hz < min_refresh_100hz) 1975 return false; 1976 1977 return true; 1978 } 1979
-- 0-DAY CI Kernel Test Service https://01.org/lkp
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