Messages in this thread Patch in this message | | | From | Andy Shevchenko <> | Subject | [PATCH v1 8/9] pwm: lpss: Add a comment to the bypass field | Date | Tue, 6 Sep 2022 22:57:34 +0300 |
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Add a comment to the bypass field based on the commit b997e3edca4f ("pwm: lpss: Set enable-bit before waiting for update-bit to go low").
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- drivers/pwm/pwm-lpss.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h index 832cb86996d7..35e570067fc6 100644 --- a/drivers/pwm/pwm-lpss.h +++ b/drivers/pwm/pwm-lpss.h @@ -29,6 +29,11 @@ struct pwm_lpss_boardinfo { unsigned long clk_rate; unsigned int npwm; unsigned long base_unit_bits; + /* + * Some versions of the IP may stuck in the state machine if enable + * bit is not set, and hence update bit will show busy status till + * the reset. For the rest it may be otherwise. + */ bool bypass; /* * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device -- 2.35.1
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