Messages in this thread | | | Date | Mon, 5 Sep 2022 12:19:16 +0100 | Subject | Re: [PATCH] perf vendor events: Add missing Neoverse V1 events | From | Nick Forrington <> |
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On 02/09/2022 20:25, Arnaldo Carvalho de Melo wrote: > Em Fri, Sep 02, 2022 at 03:12:49PM +0100, Nick Forrington escreveu: >> On 02/09/2022 09:04, John Garry wrote: >>> On 01/09/2022 16:18, Nick Forrington wrote: >>>> Based on updated data from: >>>> https://github.com/ARM-software/data/blob/master/pmu/neoverse-v1.json >>>> >>>> which is based on PMU event descriptions from the Arm Neoverse V1 >>>> Technical Reference Manual. >>>> >>>> This adds the following missing events: >>>> ASE_INST_SPEC >>>> SVE_INST_SPEC >>>> SVE_PRED_SPEC >>>> SVE_PRED_EMPTY_SPEC >>>> SVE_PRED_FULL_SPEC >>>> SVE_PRED_PARTIAL_SPEC >>>> SVE_LDFF_SPEC >>>> SVE_LDFF_FAULT_SPEC >>>> FP_SCALE_OPS_SPEC >>>> FP_FIXED_OPS_SPEC >>>> >>>> It also moves REMOTE_ACCESS from other.json to memory.json. >>> Any specific reason why? I see that neoverse n2 and a76-n1 still use >>> "other" json for REMOTE_ACCESS. Nicer to be consistent. >> Thanks John, I agree on consistency. >> >> I think memory is a better categorisation (for all CPUs), and this is >> consistent with what I submitted for various Cortex CPUs a while back. > Were those patches processed or is some still outstanding?
Those were processed.
(REMOTE_ACCESS appears in memory.json for the Cortex JSON files)
> >> I'd be happy to remove the REMOTE_ACCESS change here and update (or not) >> REMOTE_ACCESS for Neoverse separately. >> >>>> Signed-off-by: Nick Forrington<nick.forrington@arm.com> >>>> --- >>> Apart from above: >>> Reviewed-by: John Garry <john.garry@huawei.com> >> Thanks, Nick > So, how should we proceed? > > - Arnaldo
I'll update this patch to remove the REMOTE_ACCESS change, and submit a separate patch to make REMOTE_ACCESS categorisation consistent across all CPUs.
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