Messages in this thread | | | From | Dmitry Baryshkov <> | Date | Sat, 3 Sep 2022 07:50:42 +0300 | Subject | Re: [PATCH v3 1/3] PCI: qcom: Add sc7280 aggre0, aggre1 and ddr sf tbu clocks in PCIe driver |
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On Sat, 3 Sept 2022 at 05:23, Krishna chaitanya chundru <quic_krichai@quicinc.com> wrote: > > Add missing aggre0, aggre1 and ddrs sf tbu clocks in PCIe driver. > > If these clocks are not presenti, the PCIe link goes down in system suspend > and resume. > > Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
This does not apply onto the linux-next. If this is a fix intended for the current master or for the linux-stable please state so.
> --- > drivers/pci/controller/dwc/pcie-qcom.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 2ea1375..a7202f0 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1548,7 +1548,10 @@ static const struct qcom_pcie_cfg sm8450_pcie1_cfg = { > static const struct qcom_pcie_cfg sc7280_cfg = { > .ops = &ops_1_9_0, > .has_tbu_clk = true, > + .has_ddrss_sf_tbu_clk = true, > .pipe_clk_need_muxing = true, > + .has_aggre0_clk = true, > + .has_aggre1_clk = true, > }; > > static const struct qcom_pcie_cfg sc8180x_cfg = { > -- > 2.7.4 >
-- With best wishes Dmitry
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