Messages in this thread | | | Date | Wed, 28 Sep 2022 09:43:44 +0200 | Subject | Re: [PATCH 2/2] arm64: dts: qcom: ipq6018: move ARMv8 timer out of SoC node | From | Neil Armstrong <> |
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On 27/09/2022 22:12, Robert Marko wrote: > The ARM timer is usually considered not part of SoC node, just like > other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: > > arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} > From schema: dtschema/schemas/simple-bus.yaml > > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > index 57978a8ab498..428e99e127c3 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > @@ -511,14 +511,6 @@ a53pll: clock@b116000 { > clock-names = "xo"; > }; > > - timer { > - compatible = "arm,armv8-timer"; > - interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > - <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > - <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > - <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > - }; > - > timer@b120000 { > #address-cells = <1>; > #size-cells = <1>; > @@ -770,6 +762,14 @@ dwc_0: usb@8a00000 { > }; > }; > > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > + }; > + > wcss: wcss-smp2p { > compatible = "qcom,smp2p"; > qcom,smem = <435>, <428>;
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
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