Messages in this thread | | | Date | Tue, 27 Sep 2022 15:40:42 +0200 | Subject | Re: [PATCH 3/5] arm64: dts: mt8186: Add IOMMU and SMI nodes | From | AngeloGioacchino Del Regno <> |
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Il 23/09/22 15:11, Allen-KH Cheng ha scritto: > Add iommu and smi nodes for mt8186 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 173 +++++++++++++++++++++++ > 1 file changed, 173 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > index 833e7037fe22..68f06bef88f3 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > @@ -7,6 +7,7 @@ > #include <dt-bindings/clock/mt8186-clk.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/memory/mt8186-memory-port.h> > #include <dt-bindings/pinctrl/mt8186-pinfunc.h> > #include <dt-bindings/power/mt8186-power.h> > #include <dt-bindings/phy/phy.h> > @@ -944,24 +945,113 @@ > #reset-cells = <1>; > }; > > + smi_common: smi@14002000 { > + compatible = "mediatek,mt8186-smi-common"; > + reg = <0 0x14002000 0 0x1000>; > + clocks = <&mmsys CLK_MM_SMI_COMMON>, <&mmsys CLK_MM_SMI_COMMON>, > + <&mmsys CLK_MM_SMI_GALS>, <&mmsys CLK_MM_SMI_GALS>; > + clock-names = "apb", "smi", "gals0", "gals1"; > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > + }; > + > + larb0: smi@14003000 { > + compatible = "mediatek,mt8186-smi-larb"; > + reg = <0 0x14003000 0 0x1000>; > + mediatek,larb-id = <0>; > + mediatek,smi = <&smi_common>;
Order by name after reg please...
compatible reg clocks clock-names mediatek,larb-id mediatek,smi power-domains
> + clocks = <&mmsys CLK_MM_SMI_COMMON>, > + <&mmsys CLK_MM_SMI_COMMON>; > + clock-names = "apb", "smi"; > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > + }; > + > + larb1: smi@14004000 { > + compatible = "mediatek,mt8186-smi-larb"; > + reg = <0 0x14004000 0 0x1000>; > + mediatek,larb-id = <1>; > + mediatek,smi = <&smi_common>; > + clocks = <&mmsys CLK_MM_SMI_COMMON>, > + <&mmsys CLK_MM_SMI_COMMON>; > + clock-names = "apb", "smi"; > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > + }; > + > + iommu_mm: iommu@14016000 { > + compatible = "mediatek,mt8186-iommu-mm"; > + reg = <0 0x14016000 0 0x1000>; > + mediatek,larbs = <&larb0 &larb1 &larb2 &larb4 > + &larb7 &larb8 &larb9 &larb11 > + &larb13 &larb14 &larb16 &larb17 > + &larb19 &larb20>; > + interrupts = <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&mmsys CLK_MM_SMI_IOMMU>; > + clock-names = "bclk";
clocks clock-names interrupts mediatek,larbs power-domains
...etc :-)
P.S.: Same comment for the other commits, too!
Regards, Angelo
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