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    Subject[PATCH 5.10 135/141] i2c: mlxbf: incorrect base address passed during io write
    Date
    From: Asmaa Mnebhi <asmaa@nvidia.com>

    [ Upstream commit 2a5be6d1340c0fefcee8a6489cff7fd88a0d5b85 ]

    Correct the base address used during io write.
    This bug had no impact over the overall functionality of the read and write
    transactions. MLXBF_I2C_CAUSE_OR_CLEAR=0x18 so writing to (smbus->io + 0x18)
    instead of (mst_cause->ioi + 0x18) actually writes to the sc_low_timeout
    register which just sets the timeout value before a read/write aborts.

    Fixes: b5b5b32081cd206b (i2c: mlxbf: I2C SMBus driver for Mellanox BlueField SoC)
    Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
    Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
    Signed-off-by: Wolfram Sang <wsa@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/i2c/busses/i2c-mlxbf.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c
    index ab261d762dea..042c83b90734 100644
    --- a/drivers/i2c/busses/i2c-mlxbf.c
    +++ b/drivers/i2c/busses/i2c-mlxbf.c
    @@ -675,7 +675,7 @@ static int mlxbf_i2c_smbus_enable(struct mlxbf_i2c_priv *priv, u8 slave,
    /* Clear status bits. */
    writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_STATUS);
    /* Set the cause data. */
    - writel(~0x0, priv->smbus->io + MLXBF_I2C_CAUSE_OR_CLEAR);
    + writel(~0x0, priv->mst_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR);
    /* Zero PEC byte. */
    writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_PEC);
    /* Zero byte count. */
    --
    2.35.1


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