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    Subject[PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a
    Date
    Add the nodes to enable the NVM Express PCIe controller on the
    Radxa ROCK3 Model A board.

    Cc: Chukun Pan <amadeus@jmu.edu.cn>
    Cc: Michael Riesch <michael.riesch@wolfvision.net>
    Signed-off-by: Anand Moon <linux.amoon@gmail.com>
    ---
    alarm@rock-3a:~$ lspci
    0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3568 Remote Signal Processor (rev 01)
    0002:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3568 Remote Signal Processor (rev 01)
    0002:01:00.0 Non-Volatile memory controller: Micron/Crucial Technology P2 NVMe PCIe SSD (rev 01)
    ---
    .../boot/dts/rockchip/rk3568-rock-3a.dts | 36 +++++++++++++++++++
    1 file changed, 36 insertions(+)

    diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
    index fb87a168fe96..44d85ee1631e 100644
    --- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
    +++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
    @@ -79,6 +79,26 @@ vcc3v3_pcie: vcc3v3-pcie-regulator {
    vin-supply = <&vcc5v0_sys>;
    };

    + /* pi6c pcie clock generator feeds both ports */
    + vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator {
    + compatible = "regulator-fixed";
    + regulator-name = "vcc3v3_pi6c_03";
    + regulator-min-microvolt = <3300000>;
    + regulator-max-microvolt = <3300000>;
    + startup-delay-us = <200000>;
    + vin-supply = <&vcc5v0_sys>;
    + };
    +
    + pcie30_3v3: gpio-regulator {
    + compatible = "regulator-gpio";
    + regulator-name = "pcie30_3v3";
    + regulator-min-microvolt = <100000>;
    + regulator-max-microvolt = <3300000>;
    + gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
    + gpios-states = <0x1>;
    + states = <100000 0x0>, <3300000 0x1>;
    + };
    +
    vcc3v3_sys: vcc3v3-sys {
    compatible = "regulator-fixed";
    regulator-name = "vcc3v3_sys";
    @@ -546,6 +566,22 @@ &pcie2x1 {
    status = "okay";
    };

    +&pcie30phy {
    + data-lanes = <0 1 2 3>;
    + phy-supply = <&vcc3v3_pi6c_03>;
    + status = "okay";
    +};
    +
    +&pcie3x2 {
    + /* mPCIe slot */
    + num-lanes = <1>;
    + pinctrl-names = "default";
    + pinctrl-0 = <&pcie30x2m1_pins>;
    + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
    + vpcie3v3-supply = <&pcie30_3v3>;
    + status = "okay";
    +};
    +
    &pinctrl {
    cam {
    vcc_cam_en: vcc_cam_en {
    --
    2.37.3
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