| From | Chen-Yu Tsai <> | Date | Mon, 26 Sep 2022 13:09:24 +0800 | Subject | Re: [PATCH v1 02/17] clk: mediatek: add VDOSYS1 clock |
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On Tue, Sep 20, 2022 at 12:59 AM Guillaume Ranquet <granquet@baylibre.com> wrote: > > From: Pablo Sun <pablo.sun@mediatek.com> > > Add the clock gate definition for the DPI1 hardware > in VDOSYS1. > > The parent clock "hdmi_txpll" is already defined in > `mt8195.dtsi`. > > Signed-off-by: Pablo Sun <pablo.sun@mediatek.com> > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
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