Messages in this thread |  | | Date | Mon, 26 Sep 2022 01:30:51 +0300 | From | Serge Semin <> | Subject | Re: [PATCH 2/2] block: sed-opal: Cache-line-align the cmd/resp buffers |
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@Jens, @Revanth, @Jonathan do you have anything to say regarding the patch and what @Christoph suggested?
On Sun, Sep 11, 2022 at 07:28:57PM +0300, Serge Semin wrote: > Hello Christoph > > On Sat, Sep 10, 2022 at 07:32:03AM +0200, Christoph Hellwig wrote: > > On Fri, Sep 09, 2022 at 10:19:16PM +0300, Serge Semin wrote: > > > In accordance with [1] the DMA-able memory buffers must be > > > cacheline-aligned otherwise the cache writing-back and invalidation > > > performed during the mapping may cause the adjacent data being lost. It's > > > specifically required for the DMA-noncoherent platforms. Seeing the > > > opal_dev.{cmd,resp} buffers are used for DMAs in the NVME and SCSI/SD > > > drivers in framework of the nvme_sec_submit() and sd_sec_submit() methods > > > respectively we must make sure the passed buffers are cacheline-aligned to > > > prevent the denoted problem. > > > > > Same comment as for the previous one, this should work, but I think > > separate allocations for the DMAable buffers would document the intent > > much better. Given that the opal initialization isn't a fast path > > I don't think that the overhead should matter either. > > Thanks for the comment. I see your point. Let's hear the subsystem > maintainers out for their opinion regarding the most suitable solution > in this case. If they get to agree with you I'll resend the series > with altered fixes. > > -Sergey
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