Messages in this thread | | | From | Rahul Tanwar <> | Subject | [PATCH RESEND v2 0/5] Modify MxL's CGU clk driver to make it secure boot compatible | Date | Thu, 22 Sep 2022 14:24:23 +0800 |
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* Rebase on latest 6.0 clk linux tree and resend patch series because of no response from anyone so far. Please let me know if anyone has any concerns about these changes. Thanks.
MxL's CGU driver was found to be lacking below required features. Add these required lacking features:
1. Since it is a core driver, it has to conform to secure boot & secure access architecture. In order for the register accesses to be secure access compliant, it needs regmap support as per our security architecture. Hence, replace direct read/writel with regmap based IO. Also remove spinlocks because they are no longer necessary because regmap uses its own lock.
2. There are some gate clocks which are used by the power mgmt IP to gate when a certain power saving mode is activated. These gate clocks can also be gated from CGU clk driver. This creates a conflict. To avoid the conflict, by default disable gating such gate registers from CGU clk driver. But keep a flag to do so for other older IP's which uses same CGU clk IP but does not use same power mgmt IP.
3. Fix two functional bugs found during testing.
This patch series is based on below git tree: git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
Rahul Tanwar (5): clk: mxl: Switch from direct readl/writel based IO to regmap based IO clk: mxl: Remove unnecessary spinlocks clk: mxl: Avoid disabling gate clocks from clk driver clk: mxl: Add validation for register reads/writes clk: mxl: Add a missing flag to allow parent clock rate change
drivers/clk/x86/Kconfig | 5 +- drivers/clk/x86/clk-cgu-pll.c | 23 ++----- drivers/clk/x86/clk-cgu.c | 117 +++++++++++----------------------- drivers/clk/x86/clk-cgu.h | 71 +++++++++++++-------- drivers/clk/x86/clk-lgm.c | 16 +++-- 5 files changed, 101 insertions(+), 131 deletions(-)
-- 2.17.1
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