Messages in this thread | | | Date | Wed, 21 Sep 2022 15:54:01 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH v2 0/3] KVM: EFER.LMSLE cleanup |
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On Wed, Sep 21, 2022 at 06:45:24AM -0700, Jim Mattson wrote: > EFER.LMLSE is not a reserved bit on AMD64 CPUs, unless > CPUID.80000008:EBX[20] is set (or you're running very, very old > hardware). > > We really shouldn't just decide on a whim to treat EFER.LMSLE as > reserved under KVM. The guest CPUID information represents our > detailed contract with the guest software. By setting > CPUID.80000008:EBX[20], we are telling the guest that if it tries to > set EFER.LMSLE, we will raise a #GP.
I understand all that. What I'm asking is, what happens in KVM *after* your patch 1/3 is applied when a guest tries to set EFER.LMSLE? Does it #GP or does it allow the WRMSR to succeed? I.e., does KVM check when reserved bits in that MSR are being set?
By looking at it, there's kvm_enable_efer_bits() so it looks like KVM does control which bits are allowed to set and which not...?
> If we don't set that bit in the guest CPUID information and we raise > #GP on an attempt to set EFER.LMSLE, the virtual hardware is > defective.
See, this is what I don't get - why is it defective? After the revert, that bit to KVM is reserved.
> We could document this behavior as an erratum, but since a > mechanism exists to declare that the guest can expect EFER.LMSLE to > #GP, doesn't it make sense to use it?
I don't mind all that and the X86_FEATURE bit and so on - I'm just trying to ask you guys: what is KVM's behavior when the guest tries to set a reserved EFER bit.
Maybe I'm not expressing myself precisely enough...
-- Regards/Gruss, Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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