Messages in this thread | | | From | Krzysztof Kozlowski <> | Subject | Re: (subset) [PATCH v2 02/15] dt-bindings: memory: snps: Extend schema with IRQs/resets/clocks props | Date | Wed, 21 Sep 2022 20:35:35 +0200 |
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On Sat, 10 Sep 2022 22:56:46 +0300, Serge Semin wrote: > First of all the DW uMCTL2 DDRC IP-core supports the individual IRQ lines > for each standard event: ECC Corrected Error, ECC Uncorrected Error, ECC > Address Protection, Scrubber-Done signal, DFI Parity/CRC Error. It's > possible that the platform engineers merge them up in the IRQ controller > level. So let's add both configuration support to the DT-schema. > > Secondly the DW uMCTL2 DDRC IP-core can have clock sources like APB > reference clock, AXI-ports clock, main DDRC core reference clock and > Scrubber low-power clock. In addition to that each clock domain can have a > dedicated reset signal. Let's add the properties for at least the denoted > clock sources and the corresponding reset controls. > > [...]
Applied, thanks!
[02/15] dt-bindings: memory: snps: Extend schema with IRQs/resets/clocks props https://git.kernel.org/krzk/linux-mem-ctrl/c/5514acb0dd030356e628cdd88b266efaa0a22315
Best regards, -- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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