lkml.org 
[lkml]   [2022]   [Sep]   [2]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH v3 3/7] arm64: dts: mediatek: cherry: Add Google Security Chip (GSC) TPM
Date
Add support for the Cr50 Google Security Chip (GSC) found on this
platform on I2C3 to support TPM and to also use it as an entropy
source for the kernel.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 73f531f84fa2..a07e7fe66315 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -149,6 +149,14 @@ &i2c3 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
+
+ tpm@50 {
+ compatible = "google,cr50";
+ reg = <0x50>;
+ interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cr50_int>;
+ };
};

&i2c4 {
@@ -426,6 +434,13 @@ &pio {
"AP_SPI_FLASH_MOSI",
"AP_SPI_FLASH_MISO";

+ cr50_int: cr50-irq-default-pins {
+ pins-gsc-ap-int-odl {
+ pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
+ input-enable;
+ };
+ };
+
cros_ec_int: cros-ec-irq-default-pins {
pins-ec-ap-int-odl {
pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;
--
2.37.2
\
 
 \ /
  Last update: 2022-09-02 10:13    [W:0.089 / U:0.116 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site