Messages in this thread Patch in this message | | | From | "Peng Fan (OSS)" <> | Subject | [PATCH V3] dt-bindings: clock: add i.MX8M Anatop | Date | Mon, 19 Sep 2022 13:59:04 +0800 |
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From: Peng Fan <peng.fan@nxp.com>
i.MX8M Family features an anatop module the produces PLL to clock control module(CCM) root clock. Add the missing yaml file.
Signed-off-by: Peng Fan <peng.fan@nxp.com> ---
V3: Add #clock-cells property
V2: Drop syscon, use clock-controller Add fsl vendor prefix Add interrupt property
dts update not included, so there will be dtbs_check fail.
.../bindings/clock/fsl,imx8m-anatop.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml
diff --git a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml new file mode 100644 index 000000000000..bbd22e95b319 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8M Family Anatop Module + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +description: | + NXP i.MX8M Family anatop PLL module which generates PLL to CCM root. + +properties: + compatible: + oneOf: + - enum: + - fsl,imx8mm-anatop + - fsl,imx8mq-anatop + - items: + - enum: + - fsl,imx8mn-anatop + - fsl,imx8mp-anatop + - const: fsl,imx8mm-anatop + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + anatop: clock-controller@30360000 { + compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop"; + reg = <0x30360000 0x10000>; + #clock-cells = <1>; + }; + +... -- 2.37.1
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