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    Subject[PATCH v2 net-next 1/2] net: mscc: ocelot: utilize readx_poll_timeout() for chip reset
    Date
    Clean up the reset code by utilizing readx_poll_timeout instead of a custom
    loop.

    Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
    Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
    Reported-by: kernel test robot <lkp@intel.com>
    ---

    v2:
    Remove IS_ERR_VALUE macro compile error for 64-bit
    Add Reviewed and Reported tags

    ---
    drivers/net/ethernet/mscc/ocelot_vsc7514.c | 32 ++++++++++++++++------
    1 file changed, 23 insertions(+), 9 deletions(-)

    diff --git a/drivers/net/ethernet/mscc/ocelot_vsc7514.c b/drivers/net/ethernet/mscc/ocelot_vsc7514.c
    index ae42bbba5747..3fb9183c1159 100644
    --- a/drivers/net/ethernet/mscc/ocelot_vsc7514.c
    +++ b/drivers/net/ethernet/mscc/ocelot_vsc7514.c
    @@ -6,6 +6,7 @@
    */
    #include <linux/dsa/ocelot.h>
    #include <linux/interrupt.h>
    +#include <linux/iopoll.h>
    #include <linux/module.h>
    #include <linux/of_net.h>
    #include <linux/netdevice.h>
    @@ -25,6 +26,9 @@
    #define VSC7514_VCAP_POLICER_BASE 128
    #define VSC7514_VCAP_POLICER_MAX 191

    +#define MEM_INIT_SLEEP_US 1000
    +#define MEM_INIT_TIMEOUT_US 100000
    +
    static const u32 *ocelot_regmap[TARGET_MAX] = {
    [ANA] = vsc7514_ana_regmap,
    [QS] = vsc7514_qs_regmap,
    @@ -191,22 +195,32 @@ static const struct of_device_id mscc_ocelot_match[] = {
    };
    MODULE_DEVICE_TABLE(of, mscc_ocelot_match);

    +static int ocelot_mem_init_status(struct ocelot *ocelot)
    +{
    + unsigned int val;
    + int err;
    +
    + err = regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT],
    + &val);
    +
    + return err ?: val;
    +}
    +
    static int ocelot_reset(struct ocelot *ocelot)
    {
    - int retries = 100;
    + int err;
    u32 val;

    regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_INIT], 1);
    regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);

    - do {
    - msleep(1);
    - regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT],
    - &val);
    - } while (val && --retries);
    -
    - if (!retries)
    - return -ETIMEDOUT;
    + /* MEM_INIT is a self-clearing bit. Wait for it to be cleared (should be
    + * 100us) before enabling the switch core.
    + */
    + err = readx_poll_timeout(ocelot_mem_init_status, ocelot, val, !val,
    + MEM_INIT_SLEEP_US, MEM_INIT_TIMEOUT_US);
    + if (err)
    + return err;

    regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
    regmap_field_write(ocelot->regfields[SYS_RESET_CFG_CORE_ENA], 1);
    --
    2.25.1
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