Messages in this thread |  | | Date | Thu, 15 Sep 2022 11:24:06 -0500 | Subject | Re: [PATCH 4/7] cpufreq: amd_pstate: add AMD pstate EPP support for shared memory type processor | From | Nathan Fontenot <> |
| |
On 9/9/22 11:45, Perry Yuan wrote: > Add Energy Performance Preference support for AMD SOCs which only > support the shared memory interface that implemented on Zen2 and Zen3 > processors, because this type CPU has no MSR supported, it will use > ACPI PCC channel to enable EPP and reset desired perf to be zero. > > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > --- > drivers/cpufreq/amd-pstate.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index 451295284a26..fff298744a8e 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -133,12 +133,24 @@ static inline int pstate_enable(bool enable) > > static int cppc_enable(bool enable) > { > + struct cppc_perf_ctrls perf_ctrls; > int cpu, ret = 0; > > for_each_present_cpu(cpu) { > ret = cppc_set_enable(cpu, enable); > if (ret) > return ret; > + > + /* Enable active mode for EPP */ > + ret = cppc_set_auto_epp(cpu, enable); > + if (ret) > + return ret; > + > + /* Set zero to desired perf to enable EPP control*/ > + perf_ctrls.desired_perf = 0; > + ret = cppc_set_perf(cpu, &perf_ctrls); > + if (ret) > + return ret;
Shouldn't this entire block be indented one additional tab over since its part of the for_each_present_cpu() loop?
-Nathan
> } > > return ret;
|  |