Messages in this thread | | | Date | Sun, 11 Sep 2022 08:56:41 -0700 (PDT) | From | matthew.gerlach@linux ... | Subject | Re: [PATCH v1 5/5] tty: serial: 8250: add DFL bus driver for Altera 16550. |
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On Fri, 9 Sep 2022, Andy Shevchenko wrote:
> On Thu, Sep 08, 2022 at 11:27:03AM -0700, matthew.gerlach@linux.intel.com wrote: >> On Tue, 6 Sep 2022, Andy Shevchenko wrote: >>> On Tue, Sep 06, 2022 at 12:04:26PM -0700, matthew.gerlach@linux.intel.com wrote: > > ... > >>>> + dev_dbg(dfluart->dev, "UART_CLK_ID %llu Hz\n", dfluart->uart_clk); >>> >>> Isn't this available via normal interfaces to user? >> >> I am not sure what "normal interfaces to user" you are referring to. The >> code is just trying to read the frequency of the input clock to the uart >> from a DFH paramter. > > I mean dev_dbg() call. The user can get uart_clk via one of the UART/serial > ABIs (don't remember which one, though).
I don't think UART/serial ABIs to get the input clock frequency would be available until after the call to serial8250_register_8250_port() which needs the clock frequency as an input.
> > > ... > >>>> +#define FME_FEATURE_ID_UART 0x24 >>> >>> Purpose of this definition? For me with or without is still an ID. >> >> I don't think I understand the question. Is the name of the macro unclear, >> or do you think it is not necessary? > > I mean how the definition is useful / useless. I.o.w. I think it's not > necessary.
The macro may not be necessary, but its usage is consistent with other dfl bus drivers.
Thanks for the feedback, Matthew Gerlach
> > -- > With Best Regards, > Andy Shevchenko > > >
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