Messages in this thread | | | Date | Thu, 1 Sep 2022 19:08:20 +0300 | Subject | Re: [PATCH 07/14] arm64: dts: qcom: sm6115: Add sdhci nodes and related pinctrl | From | Krzysztof Kozlowski <> |
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On 01/09/2022 10:24, Iskren Chernev wrote: > Add support for the two sdhci's present on the SM6115 and the related > pinctrl. >
> > gcc: clock-controller@1400000 { > @@ -449,6 +553,73 @@ rpm_msg_ram: memory@45f0000 { > reg = <0x45f0000 0x7000>; > }; > > + sdhc_1: sdhci@4744000 { > + compatible = "qcom,sm6115-sdhci", "qcom,sdhci-msm-v5"; > + reg = <0x4744000 0x1000>, <0x4745000 0x1000>, <0x4748000 0x8000>; > + reg-names = "hc", "cqhci", "ice"; > + > + interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "hc_irq", "pwr_irq"; > + > + clocks = <&gcc GCC_SDCC1_AHB_CLK>, > + <&gcc GCC_SDCC1_APPS_CLK>, > + <&xo_board>, > + <&gcc GCC_SDCC1_ICE_CORE_CLK>; > + clock-names = "iface", "core", "xo", "ice_core_clk";
Does not look like you tested the DTS against bindings. Please run `make dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions).
> +
Best regards, Krzysztof
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