Messages in this thread | | | From | Heiko Stübner <> | Subject | Re: [PATCH v2 3/4] RISC-V: Implement arch specific PMEM APIs | Date | Thu, 01 Sep 2022 17:38:53 +0200 |
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Hi Anup,
Am Dienstag, 30. August 2022, 06:46:41 CEST schrieb Anup Patel: > The NVDIMM PMEM driver expects arch specific APIs for cache maintenance > and if arch does not provide these APIs then NVDIMM PMEM driver will > always use MEMREMAP_WT to map persistent memory which in-turn maps as > UC memory type defined by the RISC-V Svpbmt specification. > > Now that the Svpbmt and Zicbom support is available in RISC-V kernel, > we implement PMEM APIs using ALT_CMO_OP() macros so that the NVDIMM > PMEM driver can use MEMREMAP_WB to map persistent memory.
Zicbom is detected at runtime, though that kconfig setting changes the behaviour for the memremap-type at compile-time. So what happens on systems not using zicbom (or another cmo-variant) ?
Heiko
> Co-developed-by: Mayuresh Chitale <mchitale@ventanamicro.com> > Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> > Signed-off-by: Anup Patel <apatel@ventanamicro.com> > --- > arch/riscv/Kconfig | 1 + > arch/riscv/mm/Makefile | 1 + > arch/riscv/mm/pmem.c | 21 +++++++++++++++++++++ > 3 files changed, 23 insertions(+) > create mode 100644 arch/riscv/mm/pmem.c > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 0ebd8da388d8..37d6370d29c3 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -25,6 +25,7 @@ config RISCV > select ARCH_HAS_GIGANTIC_PAGE > select ARCH_HAS_KCOV > select ARCH_HAS_MMIOWB > + select ARCH_HAS_PMEM_API > select ARCH_HAS_PTE_SPECIAL > select ARCH_HAS_SET_DIRECT_MAP if MMU > select ARCH_HAS_SET_MEMORY if MMU > diff --git a/arch/riscv/mm/Makefile b/arch/riscv/mm/Makefile > index d76aabf4b94d..3b368e547f83 100644 > --- a/arch/riscv/mm/Makefile > +++ b/arch/riscv/mm/Makefile > @@ -31,3 +31,4 @@ endif > > obj-$(CONFIG_DEBUG_VIRTUAL) += physaddr.o > obj-$(CONFIG_RISCV_DMA_NONCOHERENT) += dma-noncoherent.o > +obj-$(CONFIG_ARCH_HAS_PMEM_API) += pmem.o > diff --git a/arch/riscv/mm/pmem.c b/arch/riscv/mm/pmem.c > new file mode 100644 > index 000000000000..089df92ae876 > --- /dev/null > +++ b/arch/riscv/mm/pmem.c > @@ -0,0 +1,21 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2022 Ventana Micro Systems Inc. > + */ > + > +#include <linux/export.h> > +#include <linux/libnvdimm.h> > + > +#include <asm/cacheflush.h> > + > +void arch_wb_cache_pmem(void *addr, size_t size) > +{ > + ALT_CMO_OP(clean, addr, size, riscv_cbom_block_size); > +} > +EXPORT_SYMBOL_GPL(arch_wb_cache_pmem); > + > +void arch_invalidate_pmem(void *addr, size_t size) > +{ > + ALT_CMO_OP(inval, addr, size, riscv_cbom_block_size); > +} > +EXPORT_SYMBOL_GPL(arch_invalidate_pmem); >
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