Messages in this thread | | | Date | Mon, 8 Aug 2022 12:21:36 +0300 | Subject | Re: [PATCH 3/3] arm64: dts: marvell: Add DTSI to fix Xenon SDHCI 2G limitation on AC5 SoC | From | Krzysztof Kozlowski <> |
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On 06/08/2022 11:58, Vadym Kochan wrote: > + > + soc { > + sdhci: sdhci@805c0000 { > + compatible = "marvell,ac5-sdhci"; > + reg = <0x0 0x805c0000 0x0 0x300>; > + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cnm_clock>; > + clock-names = "core"; > + marvell,ac5-sdhci-dma-bounce-pool = <&sdhci_dma_bounce_pool>;
Undocumented property.
Best regards, Krzysztof
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