Messages in this thread | | | Subject | Re: [RFC PATCH 5/5] x86/entry: Store CPU info on exception entry | From | Rik van Riel <> | Date | Fri, 05 Aug 2022 14:46:48 -0400 |
| |
On Fri, 2022-08-05 at 10:30 -0700, ira.weiny@intel.com wrote: > From: Ira Weiny <ira.weiny@intel.com> > > The CPU information of an exception is useful in determining where > bad > CPUs are in a large data center. > > Define arch_{save|restore}_auxiliary_pt_regs() and set > ARCH_HAS_PTREGS_AUXILIARY default to yes. > > Store the CPU on exception entry and use it later. > > Cc: Rik van Riel <riel@surriel.com> > Suggested-by: Borislav Petkov <bp@alien8.de> > Suggested-by: Dave Hansen <dave.hansen@intel.com> > Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Acked-by: Rik van Riel <riel@surriel.com>
-- All Rights Reversed. [unhandled content-type:application/pgp-signature] | |